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  STV1389AQ cable driver for digital transfer november 1992 2a vee vee vee vee inx gnd6 gnd7 3b gnd gnd 1a 3a gnd gnd 2b gnd5 gnd4 gnd2 gnd3 1b gnd gnd gnd iny 24 17 18 19 20 23 21 22 1 2345678 25 26 27 28 29 30 31 32 15 16 9 10 11 12 13 14 n.c. n.c. n.c. n.c. n.c. n.c. n.c. 1389-01.eps pin connections qfp32 (plastic package) order code : STV1389AQ . 1 differential input, 3 differential outputs . sufficient drive capability for a 300m length coaxial cable . stability due to minimal waveform distortion . bipolar silicon monolithic ic applications . data transfer between digital sig- nal processing equipment description the STV1389AQ offers in a single-chip a complete ic driver for digital data transfer. 1/7
pin description pin number symbol standard dc voltage equivalent circuit description 7 9 iny inx - 2.7v input pin of the differential amplifier. input executed after dc portion is cut off. 1 2 17 18 25 26 gnd2 gnd3 gnd4 gnd5 gnd6 gnd7 - collector of the emitter follower output tr. connect to gnd. 32 3 16 20 23 27 1a 1b 2a 2b 3a 3b - 2.7v emitter of emitter follower output tr. to use, connect pull-down resistor. (even when only 1 side is used pull-down is executed in pairs.) pairs 32 16 23 32027 1389-01.tbl 7 9 gnd vee 1ma 1ma 180 2k 180 2k 1389-02.eps gnd vee 1ma 1 2 17 18 26 25 27 32 3 16 20 23 1k 1389-03.eps STV1389AQ 2/7
15 24 12345678 25 26 27 28 29 30 31 32 17 18 19 20 23 16 9 10 11 12 13 14 bias gen 21 22 -5v 2a vee vee vee vee inx gnd6 gnd7 3b gnd gnd 1a 3a gnd gnd 2b gnd5 gnd4 gnd2 gnd3 1b gnd gnd gnd iny co-axial cable -5v 0.1 f 150 w 75 w 1.6vp-p 0.6vp-p 0.6vp-p 0.1 f 0.1 f n.c. n.c. n.c. n.c. n.c. n.c. n.c. when the below input is applied between inx and iny, in-phase 1.6vp-p is output at 1a, 2a and 3a. in reversed phase, 1.6vp-p is output at 1b, 2b and 3b. * various output pins are connected as indicated below. 1389-04.eps block diagram absolute maximum ratings symbol parameter value unit v cc supply voltage 7.0 v t stg storage temperature - 65, + 150 o c p d allowable power dissipation 500 mw 1389-02.tbl operating conditions symbol parameter value unit v cc supply voltage 4.8 to 5.2 v t opr operating temperature - 20, + 75 o c 1389-03.tbl electrical characteristics symbol parameter bias conditions sw on test point test min. typ. max. unit v iny v inx v1 pin voltage iny - - - pin 7 test of pin voltage - 2.9 - 2.7 - 2.5 v v2 pin voltage inx - - - pin 9 - 2.9 - 2.7 - 2.5 v a1-1 pin voltage 1a - - - pin 32 - 3.1 - 2.7 - 2.5 v b1-1 pin voltage 1b - - - pin 3 - 3.1 - 2.7 - 2.5 v a2-1 pin voltage 2a - - - pin 16 - 3.1 - 2.7 - 2.5 v b2-1 pin voltage 2b - - - pin 3 - 3.1 - 2.7 - 2.5 v 1389-04.tbl STV1389AQ 3/7
electrical characteristics (t a = 25 o c) symbol parameter bias conditions sw on test point test min. typ. max. unit v iny v inx a3-1 pin voltage 3a - - - pin 23 test of pin voltage - 3.1 - 2.7 - 2.5 v b3-1 pin voltage 3b - - - pin 27 - 3.1 - 2.7 - 2.5 v iee current power supply - - - vee current power supply at vee - 143 - 77 ma a1-2 dc applied 1a v1 + 0.2 v2 - 0.2 sw1 sw2 pin 32 output dc voltage is tested when +0.2v is applied to iny and - 0.2v to inx. (a1-2) = test value - (a1-1) (b1-2) = test value - (b1-1) the difference with the previous pin voltage is recorded. same for a2-2, b2-2, a3-2, b3-2 0.31 0.39 0.47 v b1-2 dc applied 1b pin 3 - 0.47 - 0.39 - 0.31 v a2-2 dc applied 2a pin 16 0.31 0.39 0.47 v b2-2 dc applied 2b pin 20 - 0.47 - 0.39 - 0.31 v a3-2 dc applied 3a pin 23 0.31 0.39 0.47 v b3-2 dc applied 3b pin 27 - 0.47 - 0.39 - 0.31 v v1-1 amplitude 1a + 1b calculation (v1-1) = (a1-2) - (b1-2) amplitude calculated from t10 with t15 as base, same for v2-1, v3-1. 0.65 0.75 0.85 v v2-1 amplitude 2a + 2b calculation 0.65 0.75 0.85 v v3-1 amplitude 3a + 3b calculation 0.65 0.75 0.85 v - amplitude 1a/1b calculation (a1-2) / (b1-2) 0.85 1.0 1.15 - - amplitude 2a/2b calculation 0.85 1.0 1.15 - - amplitude 3a/3b calculation 0.85 1.0 1.15 - a1-3 dc applied 1a v1 - 0.4 v1 + 0.4 sw1 sw2 pin 32 output dc voltage is tested when - 0.4v is applied to iny and + 0.4v to inx. (a1-3) = test value - (a1-1) (b1-3) = test value - (b1-1) the difference with the previous pin voltage is recorded. same for a2-3, b2-3, a3-3, b3-3 - 0.9 - 0.75 - 0.6 v b1-3 dc applied 1b pin 3 0.6 0.75 0.9 v a2-3 dc applied 2a pin 16 - 0.9 - 0.75 - 0.6 v b2-3 dc applied 2b pin 20 0.6 0.75 0.9 v a3-3 dc applied 3a pin 23 - 0.9 - 0.75 - 0.6 v b3-3 dc applied 3b pin 27 0.6 0.75 0.9 v v1-2 amplitude 1a + 1b calculation (v1-2) = (a1-3) + (b1-3) amplitude calculated from t22 with t27 as base, same for v2-2, v3-2. 1.3 1.5 1.7 v v2-2 amplitude 2a + 2b calculation 1.3 1.5 1.7 v v3-2 amplitude 3a + 3b calculation 1.3 1.5 1.7 v - amplitude 1a + 1b calculation (a1-3) / (b1-3) 0.85 1.0 1.15 v - amplitude 2a + 2b calculation (a2-3) / (b2-3) 0.85 1.0 1.15 v - amplitude 3a + 3b calculation (a3-3) / (b3-3) 0.85 1.0 1.15 v v1-3 linearity 1 calculation (v1-2) / (v1-1) 1.7 1.9 2.1 v v2-3 linearity 2 calculation (v2-2) / (v1-1) 1.7 1.9 2.1 v v3-3 linearity 3 calculation (v3-2) / (v1-1) 1.7 1.9 2.1 v 1389-05.tbl STV1389AQ 4/7
15 24 12345678 25 26 27 28 29 30 31 32 17 18 19 20 23 16 9 10 11 12 13 14 bias gen 21 22 3a 2b 2a 1b 1a 3b iny a inx b sw2 v inx sw1 v iny -5v vee -5v 150 w 150 w 150 w 150 w 150 w 150 w 1389-05.eps test circuit description of operation the STV1389AQ consists of 3 differential amplifier with a common input and a bias generator, and three differential outputs. each amplifiers provides a 6db gain and is configured as a differential output feeding the bases of a pair of current boosting on-chip emitter follower transistors. the differential input pins are internally biased and the input signal is ac-coupled to remove the d.c. component. between the output pins of each differential ampli- fier and the coaxial cable, an r-c network is con- nected to remove d.c. component from the output and for impedance matching. the series resistor has a value of 68 to 75 w to match a 75 w coaxial cable. in this manner a signal almost identitical in level to the input signal is transferred to the coaxial cable. optimum pcb layout and matching resistor value are chosen to obtain good eye pattern design at the input pins. this is necessary because the wave- form distortion at the input pins is direc tly trans- ferred to the output waveform. bias gen 0.1 f 150 w 75 w 0.1 f 150 w 75 w 75 w 0.1 f 0.1 f 0.1 f 75 w - 5v 75 w co-axial cable dc cut 6db differential amplifier to the other 2 channels 0.6v 1.5v STV1389AQ dc cut signal source = 0.8vpp matching resistor matching resistor 1389-06.eps STV1389AQ 5/7
15 24 1 2 3 4 5678 25 26 27 28 29 30 31 32 17 18 19 20 23 16 9 10 11 12 13 14 bias gen 21 22 3a 2b 2a 1b 1a 3b iny a inx b -5v -5v 150 w STV1389AQ top view same as block a same as block a 0.1 f 150 w 3 4 stv1601a serial encoder 0.1 f 0.1 f ww 220 220 *r3 *r1 10 w w *r2 10 -5v -5v 0.1 f 0.1 f 150 w w 75 0.1 f w 75 block a keep the gnd pin pattern as short as possible and provide sufficient gnd. a weak gnd will cause unstable operation since power consumption is large, conceive a pattern takingdue consideration of the radiation from the pcb. example of output waveform w v = 200mv/div h = 1ns/div keep unused output pins (both collector an emitter) open. even when only one output side is in use, connect both the pull-down resistance and the collector. signal rate 270mbps 75 for terminating pin 10 / 16v tantalum capacitor the marked * resistor is altered through the pcb pattern. adjustment is performed to obtain a good eye pattern at pins 7 and 9. 1389-07.eps test circuit STV1389AQ 6/7
9.0 0.2 7.0 0.35 0.15 1.5 0.2 0.1 0.127 0.1 0.05 0.15 0.10 24 17 25 32 1 16 9 8 0.50 8.0 0? - 10? 0.15 0.12 m 0.3 0.1 0.1 dimensions in mm 0.3 0.8 pm-qfp32.eps package mechanical data 32 pins - plastic quad flat pack information furnished is believed to be accurate and rel iable. however, sgs-thomson microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no licence is granted by implication or otherwise under any patent or patent rights of sgs-thomson microelectronics. specifications mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. sgs-thomson microelectronics products are not authorized for use as critical components in lif e support devices or systems without express written approval of sgs-thomson microelectronics. ? 1994 sgs-thomson microelectronics - all rights reserved purchase of i 2 c components of sgs-thomson microelectronics, conveys a license under the philips i 2 c patent. rights to use these components in a i 2 c system, is granted provided that the system conforms to the i 2 c standard specifications as defined by philips. sgs-thomson microelectronics group of companies australia - brazil - china - france - germany - hong kong - it aly - ja pan - korea - malaysia - malta - morocco the netherlands - singapore - spain - sweden - switzerland - taiwan - thailand - united kingdom - u.s.a. STV1389AQ 7/7


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